I'm going to continue my talk and
describe packaging trends. So in the previous video,
you learned how packaging drove quiet but influential revolutions. Now, the reason I use the word or phrase
quiet revolutions is because packaging was always this effort that was underneath,
an underlying effort. You could see its results but you didn't quite realize how influential
it was unless you worked in the field. In this particular video, I'm going to
try and explain to you how packaging helps today's products and
how it enables future opportunities. Okay, it is my observation, my belief, that today's packaging is not so
quiet, it drives these continued revolutions in the semiconductor and
microelectronic space. And these are extremely influential,
but they are not so quiet because the impact of packaging is realized very
broadly across multiple market segments. So let me explain what I mean by this, and let me point out that I'm going
to focus on advanced packaging. The way to look at advanced packaging
is think of it as the tip of the technology sphere. There are many different types of
packaging, but the greatest advances and the highest performance based advances
usually occur in advanced packaging and then they slowly but surely waterfall
into other technologies as needed. This is a report created by Yole,
a tech marketing and technical analysis company, and
they focus on this 2.5D and 3D packaging and describe what is
the value of high performance, high end packaging technologies. I will describe what the word 2.5D and
3D means and it will become pretty clear
as we walk through this. But the key insight you get out of
this report is that in the year 2021 the high end packaging
market was worth $2.74 billion. And it is projected to
reach nearly 8 billion by the year 2027 with a cumulative
aggregate growth of 19%. Breaking down into its end markets,
the biggest market is going to be the high performance packaging
in telecom and infrastructure with more than 50 per cent of the market
in each of the years 2021 to 2027. The other big thing to realize is that
high end performance packaging which is advanced packaging is
increasingly implemented in HPC, high performance compute,
cloud computing, networking, artificial intelligence,
personal computing and gaming. In other words, packaging in its most
advanced form enables significant performance in all of these areas
like high performance compute, cloud computing, gaming, etc. And this is primarily where you will
see its influence the most, okay? So what I'm going to try and describe
to you is how is advanced packaging, a vehicle for heterogeneous integration,
HI stands for Heterogeneous integration, and
this graphic describes the evolution. In the decades past, packaging used to
be a peripheral interconnect lead frame based technology which moved to a flip
chip ceramic technology, then moved to a flip chip organic technology,
became a multi chip packaging technology. And now there are advanced technologies
like 2.5D EMB, 2.5D means you connect a die to another die stack or many other
die stacks sitting next to each other laterally, or you connect them vertically
by stacking die on top of each other. And then obviously you combine the two to
go to the combination of EMB plus Foveros. And we will continue to scale
the interconnects the between the die both on top of each other and side by side through what are called
direct and omni technologies, okay? Why this interest? The interest in hi is
driven by many factors. The first is for
compute to work you need proximate memory, which means you need memory sitting
right next to the compute and you must be able to
connect the compute and the memory using a very high bandwidth and
a very low power interface. The other is,
I mentioned this before as well, for heterogeneous integration to work
effectively, you can take different IP and you can optimize them
on different processes. And then you must be able to mix and match them on a package which
forms a compact platform. The third thing is when you print
something on a piece of silicon, you print the maximum out of compute
on what is called a radical. A typical radical is somewhere in the 33
millimeters by 25 millimeters give or take a couple of millimeters here and
there. If you want to increase more and more
compute, if you want to put more memory, you need to go past this limit, which
means you must have the ability to be able to stitch or connect effectively
more than radical size die. So you must be able to escape
from radical size limits. In addition, when you introduce a new
silicon technology in the beginning, as you learn the technology or
as the technology matures, and you learn how to get rid of defects in
that technology, you start with small die. Which means you must be able to stitch
many small die, smaller die obviously yield more than larger die because
the defect density increases. So the ability to develop
products on new technologies without losing a lot of them
is called yield resiliency. And packaging helps by doing that because
you can stitch smaller die effectively. And then the main argument for doing
heterogeneous integration in the past, which used to be bringing
parts to market faster or time to market continues to be one reason. So these are the many reasons why there
is tremendous amount of interest in heterogeneous integration. And why on package HI
is attractive because you can integrate a lot in a very
compact form factor, okay? This argument or this rationale has
been demonstrated, and the package as a compact platform for heterogeneous
integration has enabled several use cases. For instance, Intel was able to build
a FPGA, Field Programmable Gate Array, and was able to connect
many interesting devices on package using the EMB
interconnect technology. We did a ADC dack interconnected to
the FPGA, we were able to take an optical tile where signals from the FPGA
went into the optical tile and were converted into optical signals that
were sent across from the package and received and reconverted into electrical. This allows you to do on
package photonics integration. Intel was awarded a government
contract to build a facility or at least a line to take all of these and
use them for newer and newer applications that will
help all of us move forward. Heterogeneous integration, I have so far
been talking about advanced packaging for HI, but
obviously there is way more than this. So today there is a broad
industry right roadmap. This is sponsored by three societies,
the three societies in IEEE, the Electronics Packaging Society, the Electronic Device Society and
the Photonic Society. They combine with two other
industry players, one is SEMI, which is an industrial consortia, and the
American Society of Mechanical Engineers. Together, all of us are comprehensively
developing a roadmap that describes what the future looks like. It articulates what is happening today,
it says what are the future trends? It says, what are the roadblocks
where people need to focus, and what are the potential solutions? So think of this as a knowledge roadmap, it allows you to think about what kind
of work you need to do in research. What kind of work you need
to do in development, what kind of partnerships you need
across the entire supply chain. It was first launched in 2019 and
has an annual cadence. It has 24 chapters and it is available for
free to the public, okay? And this is a pretty well
developed roadmap, it talks about the evolution of microelectronics
packaging along four key vectors. It talks about the markets and the systems that will utilize
heterogeneous integration. It talks about the different elements
that make something heterogeneous. It talks about the cross cutting
technologies you need, for instance, the materials,
the test to capability, the supply chain. And it talks about how they
can all be integrated together to create an advanced microelectronics
packaging based subsystem. Yeah, it is very clear if you look at all
of these trends that microelectronics packaging, especially advanced packaging,
because that drives the technology evolution, will be crucial for
the evolution of microelectronic systems. So if you think of the future, you should always think about systems
that are built out of subsystems. So total electronic systems built
out of microelectronic subsystems. The microelectronic subsystems
will be heterogeneously integrated at multiple levels. And packaging and key evolution in
technology vectors will be crucial for driving semiconductor
performance moving forward.